Hi,
I have an application where I need the FPGA to look like DDR3 DIMM interface. I need the ability to test single bit and multi-bit memory failures of our own DDR3 memory controller. In order to do so, I need the FPGA that can emulate DDR3 DIMM functionality and can generate single bit/multi bit error conditions in a controlled fashion.
I see that altera has DDR3 memory controller solution. I was curious if Altera has such a solution for DDR3 DIMM side.
