07-13-2008 04:59 PM
Hi all!I am University student. I am studying Nios2 system. I did download neek_standard_ddr_vga_mirror_design_example.zip at http://nioswiki.jot.com/wikihome/vgaapplic...selectorupdater. It is correct Cyclone III starter Kit + Nios II Embedded Evaluation Kit(NEEK). But i haven't Cyclone III starter Kit. So I try to modify CycloneIII development kit + Nios II Embedded Evaluation Kit(NEEK). In Quartus, i meet problem at Compilation. The error message is ... ... ... Error: IP Generator Error: C:/altera/kits/NEEK/neek_standard_ddr_vga_mirror_design_example/ip/neek_ddr_lcd_capture_dma/neek_ddr_lcd_capture_dma.cpp:74:8: Variable endOfPacket is not properly initialised Error: Can't elaborate user hierarchy "cycloneIII_embedded_evaluation_kit_standard_sopc:cycloneIII_embedded_evalua tion_kit_standard_sopc_instance|neek_ddr_lcd_capture_dma_inst:the_neek_ddr_lcd_c apture_dma_inst|neek_ddr_lcd_capture_dma:instance" Please help me! PS : I am Korean. So my English is poor.
07-17-2008 09:10 AM
Thank you!!Quartus 7.2 is generated neek_ddr_lcd_capture_dma ip. But i meet another error. In nios2 IDE, i executed "Run as nios II hardware" ... ... Reading System ID at address 0x0C001340: Verified Initializing CPU cache ( if present) OK Downloading 00000000 ( 0%) Downloading 00100000 (89%) Downloading 0B000020 (99%) Downloaded 72KB in 0.8s (90.0KB/s) Verifying 00000000 ( 0%) Verifying failed between address 0x0 and 0xFFFF Leaving target processor paused Does this message say what?