FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

PCI Retries

Altera_Forum
Honored Contributor II
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Hi, 

 

Anyone out there had experience of using the PCi-Compiler inplemented via SOPC builder rather than the Megawizard? 

 

I've built the system fine and can run the PCI testbench in simulation to read and write the registers in my design via the PCI compiler block (32 bit target only). 

 

When on the actual FPGA and using the Jungo driver toolset to read and write, my device comes up fine and I can write ok but the reads cause the PC to lock up. (The FPGA is on an Altera PCI dev kit board) 

 

Using signal tap it shows me that the PCI block issuing constant 'retrys' onto the PCI bus ... the Jungo driver then retries of course and the never ending loop causes the PC to freeze ... 

 

Retries are a normal operation in reads to the PCI compiler and I see them in the sim, but on the second (retried) read in the sim everything works fine and the data is presented with a normal pci disconnect .... just not in the real fpga ...  

 

Any ideas much appreciated ....
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