FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5988 Discussions

PCI compiler in Quartus 10sp1

Altera_Forum
Honored Contributor II
771 Views

Hello, 

 

I am new to Quartus with little experience.....enough to know my way around it and be familar with the design flow.....I am pretty familiar with SOPC builder and NIOS II IDE. I am having trouble getting started with PCI compiler in a 32 bit target environment with verilog target language. I followed the user guide and was able to get the master-target working but I am not using this config so I am not sure how to adapt it really as far as connections and what else I need to do in the top-level verilog. Please help....hahaha
0 Kudos
0 Replies
Reply