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Altera_Forum
Honored Contributor I
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PCIE 64-bit address mode

Hi, 

 

I am having some trouble while using 64-bit addressing mode. I generated a rootport with bar1 and bar0 merged to 64-bit. assign bar space to 2 MByte. I didn't programmed any particular BAR address while configuration. When I send a memory read request from endpoint to root port at address all 0s I get a completion failure with cmpl status = 3'b001 which means "request failed at the target because it targeted an unsupported address". I think any one or more of the following are causing the problem. 

 

1. I immplemented a 64-bit prefetchabe memory. Should I configure Prefetchable mem base/limit register. What should I program for 1MByte space? 

 

2. Is address value all 0's a valid address for prefetchable memory (since the lower four bits of BAR0 are fixed to 4'hc). 

 

3. When I program all F's to BAR 0 and then read it back I always get 32'h00_00_00_0C for 1MB (even for less than 1 MB let say 64KB) BAR. I was expecting the upper bits should be all 1's depending on the size. Am i right or it should be as is? 

 

Please help me in solving the issue. same setup is working ok for 32-bit bar and 3DW Header read requests. 

 

Thanks in advance
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