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PCIE example design - error compiling with Modelsim

MAdel
Beginner
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I generated an example PCIE design for Arria 10. I then go to the sim/mentor directory, source the msim_setup.tcl and run ld, ld_debug or com TCL commands from Modelsim. In all cases, I get the following error:

 

-- Compiling module twentynm_xcvr_avmm

# Top level modules:

# twentynm_xcvr_avmm

# End time: 10:38:42 on Jul 30,2018, Elapsed time: 0:00:00

# Errors: 0, Warnings: 0

# Model Technology ModelSim - Intel FPGA Edition vlog 10.6c Compiler 2017.07 Jul 26 2017

# Start time: 10:38:42 on Jul 30,2018

# vlog -reportprogress 300 -sv ./../../altera_xcvr_atx_pll_a10_180/sim/mentor/twentynm_xcvr_avmm.sv -L altera_common_sv_packages -work pcie_example_design_altera_xcvr_atx_pll_a10_180 

# ** Fatal: Unexpected signal: 11.

# ** Error: ./../../altera_xcvr_atx_pll_a10_180/sim/mentor/twentynm_xcvr_avmm.sv(38): in protected region

 

I tried this with Quartus 16, 17 and 18, with similar results. Given that the file is encrypted, I am at a loss of how to debug this further. Please help.

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AnandRaj_S_Intel
Employee
656 Views

Hi,

 

Can you recheck the below points.

Steps:

  1. <example_design>/pcie_example_design_tb/pcie_example_design_tb/sim/mentor/
  2. do msim_setup.tcl
  3. ld_debug
  4. run -all

 

If you are using Quartus v18 to generate the design then use modelsim v10.6c and so on to avoid the errors.

 

Below link gives more information on which modelsim version can be used for quartus version

https://www.intel.com/content/www/us/en/programmable/downloads/download-center.html

 

Let me know if you need any further assistance.

 

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)

 

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MAdel
Beginner
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Yes - these are the steps I perform - they are straight out of the user guide. Step 3 fails with the error I posted. Attaching the transcript
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AnandRaj_S_Intel
Employee
656 Views

Hi,

 

But we had successfully simulated using quartus 17.0 std and modelsim 10.5b.

Attached the image for reference.

I have generated the qsys system after generating the example PCIE design.

Kindly recheck hope it helps.

 

PCIE_HIP_Sim.png

 

Let me know if you need any further assistance.

 

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)

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Abe
Valued Contributor II
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Usually Singal 11 error messages from Mentor ModelSim tool has to do with language syntax or bug in tool. Since the tool version you are using is 10.6C and there are no issues with 10.5b, I suggest you downgrade the tool version to 10.5b and try. Uninstall the ModelSim Intel 10.6c version, download and install the ModelSim Intel 10.5b version and try again.

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