Hi guys, I'm hoping someone here can help.
I am using the PCIe Hardcore in one of my designs on a Stratix IV device.
I have generated the core as i want it and also have the Altera-generated testbench with their chaining DMA design and i can run this no problems.
What i now want to do is build a testbench for my FPGA and within this testbench i want to be able to instantiate the root port that altera have in their testbench and 'drive' my FPGA from within my testbench.
As it stands, I can see no clear way to do this, as their testbench doesn't appear to have a standalone root-port component that can be just dropped-in to my testbench.
Has anyone managed it / or got any pointers on how to acheive it ?
Any help much appretiated.
