Hi,I want to send data to my custom module with PCIe from PC to Stratix IV. I have used the chaining_dma design that sends the data with PCIe to DDR3 external memory on the board. I can read and write data by using of a software code that generated by WinDriver Wizard. But It seems that these reads and writes are not on the DDR3 memory address space. 1- Should I set offset address to a special address for read and write on DDR3 not onchip memory? 2- How I can insert my custom module to chaining_dma design and set it's input data to the data that recieved from PCIe (I don't know how to access the data that PCIe sends to FPGA )?? Thanks a lot for any help.
Thank for your helpI have read this user guide, but there is some problems with this design. I have changed chaining_dma design a bit: I have inverted "local_rdata" signal (that is read data of ddr3) and send this signal to pcie, but at the host side there is no change in read data in software. I guess that the software doesn't read and write in DDR3. Is it correct?