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5952 Discussions

PLL cascading with Cyclone-V-GX

AGofs
Novice
287 Views

Good evening everyone,

I'm trying to build a small project, which consists of two cascaded PLL's:

The first one First is Integer N-PLL (upstream).

The second one is Fractional N-PLL is (downstream)-it is configurable PLL.

I'm getting error at Fitter such like this:

Error (170084): Can't route signal "PLL_160:U0|PLL_160_0002:pll_160_inst|altera_pll:altera_pll_i|altera_cyclonev_pll:cyclonev_pll|cascade_wire[0]" to atom "ALTCLKCTRL:BUFF_1|ALTCLKCTRL_altclkctrl_0:altclkctrl_0|ALTCLKCTRL_altclkctrl_0_sub:ALTCLKCTRL_altclkctrl_0_sub_component|sd1"

I've tried to put ALTCLKCTRL component or/and GLOBAL primitive between Integer N-PLL cascade output and Reconfigurable Fractional N-PLL adjpplin input-without success.

What is wrong? How can I fix it?

0 Kudos
3 Replies
AGofs
Novice
159 Views

Good morning everyone,

Do you have something new about this issue?

 

Rahul_S_Intel1
Employee
159 Views

Hi ,

The above error is mainly due to wrong usage of the IP, and it is not recommended to connect to ATCLKCTRL in between cascading

Rahul_S_Intel1
Employee
159 Views

Hi ,

 

 Kindly let me know, if you need further assistance.

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