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Pipeline Bridge

Altera_Forum
Honored Contributor II
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Hi, 

 

i have a problem with the address calculation of the pipeline bridge. 

I'am using Quartus 10.0 Sp1 and SOPC Builder. 

 

To increase the system frequency, i want to use a pipeline bridge 

tha is connected to a tristate bridge. 

the tristate bridge is connected to three memories. 

( See attachment ) 

 

Flash : 0x00000000 .. 0x03ffffff (64 MByte) 

SRAM : 0x04000000 .. 0x040fffff ( 1 MByte ) 

FE-RAM : 0x04100000 .. 0x04101fff ( 8 KByte ) 

 

The "Base Address" from the Pipeline Bridge is 0x00000000 ! 

 

SOPC Calculates the "End Address" 0x07ffffff. Why ? 

 

I expect that the "End Address" must have 0x04101fff. 

 

Can anyone explain the address calculation of the pipeline bridge ? 

 

Thanks,
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Altera_Forum
Honored Contributor II
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Because the address decode will always ignore low order bits - or, equiv, all items are 2^n bits wide.

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Altera_Forum
Honored Contributor II
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This is from chapter 11 of Quartus Handbook (Avalon Memory-Mapped Bridges): 

"The address span of an Avalon-MM bridge is the smallest power-of-two size that 

encompasses all of its slave’s ranges."
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Altera_Forum
Honored Contributor II
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Thank you for your answers. 

 

Ok. Any Bridge, (Clock Crossing or Pipeline) delivers a new Master Port to the Components that are enclosed from the Bridge. 

 

If i want to Address (64 MByte + 1 MByte + 8KByte), the Master Port needs 27 Address lines to access all slave addresses. 

 

2^27 = 128 MByte = 0x07FFFFFF 

 

Result:  

The Address Range for my Pipeline Bridge is 0x00000000..0x07FFFFFF 

 

I have to think better soon ;-)
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