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Problem of Viterbi decoder

Altera_Forum
Honored Contributor II
‎08-15-2010 09:00 PM
1,008 Views

Hi all, 

 

I am using the altera viterbi ip core, while I am stucked with the configuration.  

For my situation, I use parallel mode with continous optimization, and I kept signal "source_rdy", "sink_val" high all the time, with a random input, but the output is not what it supposes to be. Can anyone help me with this? 

 

Thanks in advance 

 

George
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