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Problem to use LT24 module with qsys and quartus prime 16.1

EGori1
Beginner
450 Views

Hi all!

I try to develope simple project with quartus prime 16.1 de-10 lite board and terasic lt24 module (university program), NIOS II and Qsys. I have already downloaded the example from lt24 terasic web page but there are mismatches into the files (in qsys a warning advise to update some IPs). Anyway, in qsys I add a lt24 controller and, according to documentation, a video pll (in order to provide correct clock to daughter board). The lt24 controller has a sink interface linked to a source interface of a video pixel buffer DMA (It has the same clock of LT24 controller IP). Generating HDL and synthesis works fine but the result is onlyh a withe LCD screen. This is the program:

 

int main()

{

   printf("avvio il programma\n");

   alt_up_pixel_buffer_dma_dev *buffer;

   buffer = alt_up_pixel_buffer_dma_open_dev("/dev/video_pixel_buffer_dma_0");

 

alt_up_pixel_buffer_dma_clear_screen(buffer,0);

      alt_up_pixel_buffer_dma_clear_screen(buffer,1);

 

      alt_up_pixel_buffer_dma_draw_rectangle(buffer, 0, 0, 255, 255, 0x001F, 0);

 

      alt_up_pixel_buffer_dma_draw_box(buffer,10,10,255,255,0x001F,1);

}

 

In the teraisc demo example there are same code and function to initializate the LCD and the LT24 controller but I don't have these code in my auto generated HAL files. Can anyone help me?

 

I had checked pin assignement in quartus and, of course, the daughter board works fine.

 

Thanks!

 

0 Kudos
4 Replies
Kenny_Tan
Moderator
155 Views
Can you put a link here where you get the terasic demo example?
EGori1
Beginner
155 Views
Kenny_Tan
Moderator
155 Views

can you check this out? https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=68&No=1011&PartNo=4#s...

 

Click on the terasic support for the missing files.

Kenny_Tan
Moderator
155 Views
is there any update?
Reply