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Problem when using a bdf file to synthesize the ethernet

Altera_Forum
Honored Contributor II
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Hi all, 

 

I am using a design example named simple socket server plus for ethernet on my 3c120 dev board. When I used .v file which is given in the example as a top file it works fine, the problem is that when i create a symbol file with .v and use it in a .bdf file, quartus show many errors like this: 

 

Error:The DDIO_OUT WYSIWYG primitive"temp:inst|nios2_linux_3c120_125mhz_sys_sopc_inst|ddr2_lo_latency_128m:the_ddr2_lo_latency_128m_controller_phy:ddr2_lo_latency_128m_controller_phy_inst|ddr2_lo_latency_128m_phy_alt_mem_phy:ddr2_lo_latency_128m_phy_alt_mem_phy_inst|ddr2_lo_latency_128m_phy_alt_mem_phy_dp_io:dpio|.....dpio|dps_group[0].dq[0].dqobuf" has multiple fan-outs. 

 

Anyone know how to deal with this problem? 

 

Thanks 

 

Jiaqi Yuan
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