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Valued Contributor III
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RapidIO (Configure Transceiver) IV GX

Hello, 

 

I am building a project including RapidIO in Quartus 10.0. I now wish to edit the Stratix IV GX transceiver. But all the boxes are grayed out (besides device and clock input). 

When I open an example project in Quartus 10.0 from Quartus 9.0 it does allow me to edit all these options. 

 

For example I need to change the protocol on the first page but I can't. Or could this be a licence thing? 

 

Regards, 

Thormodo
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Valued Contributor III
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i don't expect this behavior from a licensing issue. i see the same here 

 

i'm not sure if this is a bug or intended behavior by 10.0+, i don't use SRIO
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Valued Contributor III
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Thanks for trying it out for me.  

 

Well I'm pretty sure it's not intended behaviour. Since I need to configure at least a few things. For example I wish to loop-back (which is possible for Serial RapidIO according to the data sheets) and that I wish to generate a block (bsf) file. And there are a lot of other things I will have to configure, before the design will be able to work. 

 

I suppose I should ask Altera about it then.
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Valued Contributor III
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to create a .bsf, go to page 3: Summary of the RapidIO MegaWizard 

 

i'm not sure about serial loopback, i took a quick look at the UG and didn't get impression that its possible
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Valued Contributor III
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if you generate a SRIO core and open the riophy_gxb.v/.vhd, you see a parameter called LOCKDOWN_EXCL "RAPIDIO". i think you are seeing the intended behavior of the core

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Valued Contributor III
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Well I can't change anything on the "files to generate" page either, it's grayed out like almost everything else. 

 

And why would you be able to change it in Quartus 9.0, but not in Quartus 10.0? And when I open a Quartus 9.0 project in 10.0 I can also edit all these options (chose whether or not I wish to loop-back etc.). There are also quite some more blue tabs when I do the latter.
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Valued Contributor III
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that's odd about the Page 3 Summary page having greyed items, i don't see that here. you should probably try and file a service request to report the bug and get clarification on the loopback 

 

a work around for the .bsf would be using Quartus to generate one from the source HDL after you generate the SRIO core using File > Create / Update > Create Symbol
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Valued Contributor III
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I've contacted Altera about this matter and I thought I'd give an update. 

Basicly they are all bugs. 

 

That all the options become available when you import a Quartus 9 project into Quartus 10.0 is a bug they didn't know about yet. I quote:" 

In v10SP1 the following transceiver options should be available (and no more): TX/RX Bandwidth, PPM threshold, ATXPLL, Receiver Analog Settings, Transmitter Analog Setting, Starting Channel Number." 

 

They will try to fix this in the next release coming in December 2010. 

 

They were a bit vague about loopback being a bug or not. What I am sure about is that at the moment it is not possible. Everything should be working right, but they they basicly didn't bring out the enable signal, so it's not available to choose atm. 

Now I will have to loopback via a switch, which is ofcourse a lot harder to accomplish. 

 

Also there is a rxgxbclk clock signal that is internal but brought to the outside in case people want to use it. This signal is not documented though as being an useable signal. But you can just leave it open if you don't need it.
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