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Reset signal for blocks in DSPBuilder model

Altera_Forum
Honored Contributor II
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Hello everyone, 

 

I have some flip flops in my DSPBuilder design and want to reset them, when a global reset occurs. E.g. if I compile and run a software project for NIOS out of Eclipse SBT, I want that every time I start the program, the flip flops are resetted. 

 

I tried different ways already: 

- connecting the Global Reset (SCLR) block with the aclrn port of the flipflops --> I see that SCLR is active high and aclrn is active low, but negating SCLR didn't help 

- using the aclr signal of the clock-block of the model (was set to active low in the option dialog) 

 

I realized that there are different ways (synchronous, asynchronous, active-low, active-high). Right now either the flipflops are resetted the whole time or they aren't resetted at all. 

 

Where and what are the necessary options to make it work like described in the very first section. 

 

Regards, 

Sebastian
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