SERDES IP core for LVDS interfacing

[Altera_Forum]

Hello everyone, 

I need to do some video bypassing project on Cyclone V FPGA, which receives video from 28bits DVI and serialize them to 4bits LVDS interface, in order to display the video on LCD screen. For that I need to implement an SER IP to perform DVI to 4bits LVDS conversion. I found some documents provided by Altera in 2007 about SERDES megafunction IP core. Howeve I can't find anything similar in my Quartus14.0 IP Catalog, It turns out that this IP core is not free anymore, instead, the IP core is called Video LVDS SERDES Transmitter/Receiver and is sold by Microtronix(https://www.altera.com/products/intellectual-property/all-ip/dsp/additional-functions/m-mtx-lvds-serdes.html). Does anyone know how to implement a Serialization transmitter that make 7:1 Serialization from scratch? Thanks a lot.

[Altera_Forum]

Go to the IP Catalog and type lvds. 

 There should be the ALTLVDS_TX.  Try this one

[Altera_Forum]

Thanks for reply, before asking for help, I've tried everything related to lvds/ser/des/, etc, There's nothing I can find from IP Catalog. I guess it's maybe because of the Quartus licence that I use, however I can't get the full licence due to

[Altera_Forum]

As Taz1984 suggested, go to the IP Catalog in Quartus 14.0, look under Library - Basic Functions - IO and see ALTLVDS_TX.

[Altera_Forum]

hie gladys, 

 Maybe you wanna include a screenshot of your QII window? I am using the QII Web Edition, v14.0, for CV as well. i don't have this issue.  You should be able 2 pull out the ALTLVDS_TX IP 2 ways: a. add a symbol > libraries > megafunctions > IO > ALTLVDS_TX b. IP catalog > search for LVDS  i attached 2 screenshots, which hopefully is helpful to you.  thanx https://www.alteraforum.com/forum/attachment.php?attachmentid=10741 https://www.alteraforum.com/forum/attachment.php?attachmentid=10742