I am trying to test out my system's memory layout for the Ethernet. I have the descriptor memory configured as on-chip memory and I also have the same memory being used as the data buffers.
For example 0x00 to 0xBF is used as descriptor memory. 0xC0 on is used as buffers for the packet data. This means I have the read and write of the SG_DMA RX/TX going to the descriptor memory also. I am using the UCOSII setup files as a starting place and trying to go from there. I can get the PHY setup working correctly, but I can't seem to get the SGDMA to correctly work during the setup. I call from the tse_mac_init function.
status = tse_sgdma_read_init(&tse)
I see the first RX Descriptor created with address at 0x60 and the next RX descriptor at 0x80. The write address is properly set to match it's descriptor index. Also it sets the desc_control to 0x80 and everything else to 0x0. Then this is called. tse_mac_aRxRead( &tse_ptr->mi, tse_ptr->currdescriptor_ptr)This currdescriptor_ptr is pointing to the newly created descriptor at 0x60. From here the this function is called. alt_avalon_sgdma_do_async_transfer(mi->rx_sgdma, (alt_sgdma_descriptor *) &rxDesc)In this function the next descriptor pointer register for the RX_SGDMA is set to 0x60. Then the desc_control for the descriptor is set to 0x7C. After this the desc_status turns to 0x80 the desc_control to 0x0 and the RX_SGDMA status register shows 0xE. Is there something that I'm missing in the initialization maybe due to the small MAC 10/100 vs the standard MAC?