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Hello Everyone,
I am new to this Forum. Recently, I have started working on Cyclone IV FPGA. Actually, this is first time i am working on FPGAs. So, I hope my questions are not confusing and stupid. I have a qsys design which has NIOS II processor and SPI core connected to it. With this, I am able to use SPI as master and read/write bytes from/to external SPI slave. Now, I am trying to use SPI core in conjunction with DMA controller on Cyclone IV to send and receive the bytes without intervening the NIOSII. I would be glad, if someone can help me with some tips or examples to further proceed with this design. Please share if someone has any link or design examples which can give more insight to me on this. Thanks in advance. Regards PavanLink Copied
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