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SRIO IP core with loop simulation

Altera_Forum
Honored Contributor II
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Hello, 

I'd like to know is there someone familiar with this rapid io ip core? I have met some troubles... 

While I'm doing simulation of IP core loop operation with ModelSim, I found that io_s_rd_readdata is a red line. 

I don't know how to deal with it... 

http://www.alteraforum.com/forum/attachment.php?attachmentid=12207&stc=1
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