FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5914 Discussions

Simple IP creation fail

Honored Contributor II

Hello all, 


I am trying to create an IP component for the need of a project (home-made avalon master ans simulation with slave BFM). 

Under the component editor of Platform Designer/Qsys, I run into some error when adding my hand-written master and analyzing it: 

Error: Family Cyclone 10 GX is not installed Error: Error (P0): Flow failed: Current design not found Info: Warning: Quartus Prime Synthesis was unsuccessful. 2 errors, 0 warnings  


However, as I only want to use this component for my Arria 10-based project, I don't need any Cyclone (nor Stratix) family components. 

Is it possible to bypass this checks ? 

I would be glad not not have to install the other two families for nothing ... 


I attached the complete Qsys log if relevant. 


Thanks !
0 Kudos
1 Reply
Honored Contributor II

Some update: installing the device bundle solved the issue, but this is not surprising. 

However, I still would like to uninstall the ~50Gb I downloaded "just to see"! Any clue on a bypass?