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6673 Diskussionen

Stratix V Native Phy

Altera_Forum
Geehrter Beitragender II
2.319Aufrufe

Hi all 

i'm working on "Transceiver Signal Integrity Development Kit" with strativ V GX. 

i'v already worked with 10Gbase-R Transceiver phy with no problem, and i tested my design with an Ethernet analyzer Device. 

but i need to use Native Phy in PMA Direct mode, to use the line data for mapping in another protocol. 

in first step i tried to loop the rx data to tx data, to test the design with Ethernet analyzer, but it doesn't work, when tx data rate is 10Gbit/s, the rx data rate is approx. 8Gbit/s. indeed, rx data rate is always less than tx data rate. 

something is wrong, but i can't understand what is. 

i'v studied all altera documents about Transceivers and i'v reviewed the altera online training in this field. 

has anybody no idea about that. 

i can present more details about my design in case of need. even attach the project here. 

thanks a lot
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7 Antworten
Altera_Forum
Geehrter Beitragender II
1.023Aufrufe

Read through the Transceiver Toolkit notes I wrote near the top of this page: 

 

https://www.ovro.caltech.edu/~dwh/correlator/cobra_docs.html 

 

Perhaps there will be something that helps in there. Take a look at the Arria V GZ document too, that device uses the same PHY as the Stratix V. 

 

Cheers, 

Dave
Altera_Forum
Geehrter Beitragender II
1.023Aufrufe

 

--- Quote Start ---  

Read through the Transceiver Toolkit notes I wrote near the top of this page:https://www.ovro.caltech.edu/~dwh/correlator/cobra_docs.htmlPerhaps there will be something that helps in there. Take a look at the Arria V GZ document too, that device uses the same PHY as the Stratix V.Cheers,Dave 

--- Quote End ---  

thanks dear Dave for your attentionunfortunately it couldn't help me in this issuei'm really confused, how can i solve the problemit doesn't seem so difficult, rx PMA would deserialize the data and parallel data on its output goes to input of tx PMA that serialize it again.i considered all of clock and pll correctly, and also defined timing constraint for it.but it doesn't worki need someone that has experience in PMA Direct mode.
Altera_Forum
Geehrter Beitragender II
1.023Aufrufe

Hi all 

there's no answer to help me in this issue?? 

i could redefine the problem again: 

i want to use stratix v Transceiver in PMA Direct mode to loop the incoming data from optical interface. 

i tested different approaches, but none of them could help me to find the final solution. 

i'm waiting yet
Altera_Forum
Geehrter Beitragender II
1.023Aufrufe

I recommend that you open a Service Request with Altera.

Altera_Forum
Geehrter Beitragender II
1.023Aufrufe

 

--- Quote Start ---  

 

there's no answer to help me in this issue?? 

 

--- Quote End ---  

 

Have you tried simulating your design? That is typically the best way to debug a problem. There is no point in submitting a Service Request if you cannot submit a simulation demonstrating the issue. 

 

The examples I posted should have simulation examples, so you can use those as the basis of your simulation. 

 

Cheers. 

Dave
Altera_Forum
Geehrter Beitragender II
1.023Aufrufe

 

--- Quote Start ---  

Have you tried simulating your design? That is typically the best way to debug a problem. There is no point in submitting a Service Request if you cannot submit a simulation demonstrating the issue. 

 

The examples I posted should have simulation examples, so you can use those as the basis of your simulation. 

 

Cheers. 

Dave 

--- Quote End ---  

 

 

Thanks dear Dave 

yea, it could be a good idea. 

Ok i'll do the simulation and make a Service Request to Altera.
Altera_Forum
Geehrter Beitragender II
1.023Aufrufe

 

--- Quote Start ---  

Hi alli'm working on "Transceiver Signal Integrity Development Kit" with strativ V GX.i'v already worked with 10Gbase-R Transceiver phy with no problem, and i tested my design with an Ethernet analyzer Device.but i need to use Native Phy in PMA Direct mode, to use the line data for mapping in another protocol.in first step i tried to loop the rx data to tx data, to test the design with Ethernet analyzer, but it doesn't work, when tx data rate is 10Gbit/s, the rx data rate is approx. 8Gbit/s. indeed, rx data rate is always less than tx data rate.something is wrong, but i can't understand what is.i'v studied all altera documents about Transceivers and i'v reviewed the altera online training in this field.has anybody no idea about that.i can present more details about my design in case of need. even attach the project here.thanks a lot 

--- Quote End ---  

Hi, I have met the same problem. Did u solved this? If u have solved , can you tell me the way. Thanks.
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