I am using TSE MAC IP in 10/100 Mbps Small MAC mode to interface DP83849IVS PHY. Due to a design change in our system, I am forced to remove the NIOS II CPU associated with it and the system side interface of this IP has to be controlled by a coldfire processor software external to this FPGA through some parallel interface.
Is there any other IP through which I can interface DP83849IVS PHY from National without using the NIOS II CPU in Cyclone III (ep3c40)???
If I have to use the same TSE MAC IP using mega wizard, should the DMA controller be in coldfire processor or in Altera FPGA.
Is there any Avalon ST and Avalon MM interfaces available for this design.
I am actually looking to implement something like this: COLD FIRE PROCESSOR ---> FLEXBUS INTERFACE SLAVE ---> AVALON STREAMING INTERFACE FOR TSE MAC IP FIFO Interface and AVALON MEMORY MAPPED Interface for Control Registers of TSE MAC.