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Altera_Forum
Honored Contributor I
997 Views

Totally confused by the DDR2 high performance controller II

The user guide from Altera is bad ! 

 

Who can teach me how to use the following inputs? 

local_address 

local_be 

local_burstbegin 

local_read_req 

local_write_req 

local_size 

local_wdata 

 

Who can show me a simple example that just write some data into the DDR2 and then read? 

 

The so-called user guide has just a lot of definitions, but no detailed examples!!! 

 

Thanks in advance!!!
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11 Replies
Altera_Forum
Honored Contributor I
41 Views

Why not to use SOPC/QSys and take out only Avalon-MM signals?

Altera_Forum
Honored Contributor I
41 Views

thanks, but I don't know anything about SOPC/QSYS, and I don't want to get more confused.....

Altera_Forum
Honored Contributor I
41 Views

Well, the Avalon-MM bus is way much easier to work with, so I think it'd be better for You to check it out :) 

 

Or if You really really don't want to use Avalon-MM, then download Avalon-MM memory master read/write examples. Those signals in Avalon-MM are probably the same as exported from the core generated by megawizard.
Altera_Forum
Honored Contributor I
41 Views

Thanks again, but I really want someone can teach me how to use the high performance controller II directly.......

Altera_Forum
Honored Contributor I
41 Views

Altera_Forum
Honored Contributor I
41 Views

yes, I do look at the timing diagrams, but those diagrams are too "theoretical", I cannot produce the same diagrams in my quartus II.................

Altera_Forum
Honored Contributor I
41 Views

In addition, those timing diagrams are separate read or write operation, if you write and then read the same DDR2, the timing is a different story....

Altera_Forum
Honored Contributor I
41 Views

run the example top simulation?

Altera_Forum
Honored Contributor I
41 Views

okay, I will run the example and try to learn something from it..... does it really help the understanding?

Altera_Forum
Honored Contributor I
41 Views

I also have a question about avalon-mm port of DDR2 HPC-II. 

 

What are settings for the following interface properties: 

1. burstOnBurstBoundariesOnly  

2. linewrapBursts 

 

I didn't find answers in Altera's External Memory Interface Handbook nor in the wiki mentioned in the post above.
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