FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

Transciever tool kit

vkc
Beginner
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Hii, I am using stratix 4 device and altgx ip as a transciever channel. Is it possible to enable ADME(altera debug master end point) through altgx ip or any alternate method.
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CheePin_C_Intel
Employee
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Hi,


As I understand it, you have some inquiries related to using XCVR toolkit with the SIV device. For your information, the SIV ALTGX does not support the ADME like A10 devices. To use the toolkit with SIV XCVR, you would need to use the custom toolkit design from the following link:


https://www.intel.com/content/www/us/en/programmable/support/support-resources/design-examples/design-software/on-chip-debugging.html


Note that the latest design version for SIV devices is Q13.0sp1. You would need to use the same Quartus version to ensure compatibility.

 

Please let me know if there is any concern. Thank you.


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CheePin_C_Intel
Employee
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Hi,


As I understand it, it has been some time since I last heard from you. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.



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