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Understanding Mailbox Core

Honored Contributor I



I am trying to understand how the mailbox core can be used to facilitate inter-process communication... 


It seems that the functionality of the mailbox core is the same as a FIFO. With a FIFO multiple masters can write 32-bit messages and another processor can read these messages out. Why would someone use the mailbox core?
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Honored Contributor I

What the mailbox core provides is mutexes. With mutexes you guarantee that only one processor will write to the shared memory and that only one processor will read it. Without mutexes, you could have two processors simultaneously trying to access the memory, and that could lead to problems. 


But as you said, you can also use a hardware FIFO for the job, with the following restrictions: 

- multiple processors can write 32-bits messages, OR a unique processor can write messages of any length 

- a unique processor can read the messages 


The mailbox core doesn't have those restrictions, and lets you have any number of processors reading and writing. You can also have messages bigger than 32-bit, even if I think that the software driver only supports 32 bits. It's a software limitation though, you could extend it to support bigger messages.