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5887 Discussions

Using Video IP with time limited sof

BMart12
New Contributor I
858 Views

Hello,

I am working on a project to develop an embedded system based on the Cyclone V 5CSXFC6D6F31C8 FPGA.  I am using 18.1.1 Build 646 04/11/2019 SJ Standard Edition.  The system design requires two LCD displays.  In Platform Designer I implement two each of the following Intel IP cores:  The Frame Buffer II IP core and the Clocked Video Output II IP Core.

 I previously had a temporary license for the VIP package and produced an rbf.  The license has expired so now I am trying to use the time limited sof to continue  my development.  I have figured out that the sof only activates the IP for the first LCD.  My issue is that the X terminal does not display on the LCD.  I captured logs from the rbf version and the sof version to troubleshoot the issue.  I compared the sof versions of the logs against the rbf versions.  The only significant difference I found is in the lightdm.logs.  In the sof version, the seat greeter session is not created.  I do not see any indication of why the session is not created.  I provide the following logs for reference:

The boot message logs: Rbf_LXDE4GB_Boot.log and Sof_LXDE4GB-2_boot.log

The Xorg logs: Rbf_Xorg.0.log and SOF_Xorg.0.log

The lightdm logs: Rbf_lightdm.log and Sof_lightdm.log

The x-0 logs: Rbf_Xorg.0.log and Sof_x-0.log

The process lists: ps_rbf00.log and ps_sof00.log

Please let me know how I can activate the X terminal for LCD 1.

Thanks,

Ben Martinez

0 Kudos
13 Replies
AR_A_Intel
Employee
809 Views

Hi Sir

 

Welcome to INTEL forum. May we know, is this the board that you refer to? https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/kit-cy...


BMart12
New Contributor I
807 Views

Hello,

Our design is based on the Terasic DE10-Standard development board.

Thanks,

Ben Martinez

AR_A_Intel
Employee
791 Views

Hi Sir

 

The DE10 Board belong to Terasic. It would be better if you could contact Terasic for enquiry related to Terasic board. https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=12&No=20    

 

Please accept my apologies for not being able to assist you fully as this is out of my expertise.


BMart12
New Contributor I
787 Views

Hello,

My problem has nothing to do with the development board.  The issue is with the results produced by the time limited sof.  Theoretically the time limited sof is supposed to enable a user to evaluate the IP.  I am asking for information on how to make the sof usable.  Our development has moved beyond the development board phase and in fact, the hardware designer also used elements of the Intel Cyclone V design.  If this issue is outside of your expertise, perhaps you can refer me to someone who can help me.

Ben Martinez

AR_A_Intel
Employee
773 Views

Hi Sir

 

Based on my understanding, this is due to the IP Evaluation Mode limitation behavior. The IP needs a valid license to be activated.

Could you provide the following for further checking?

 

Name:

Email Address:

Company/University Name:

Company/University address:

1) Machine OS information

2) previous temporary License.dat file

3) Error message screenshot

4) Screenshot of Quartus >> tools >> license setup

5) assembler report .asm.rpt file

•           The assembler report is located in <Project directory>/Output_files/<project_name>.asm.rpt.

 

And for privacy, you can reply/attach your file in private message.


BMart12
New Contributor I
769 Views

Name: Ben Martinez

Email Address: bmartinez@ndtsystems.com

Company/University Name: NDT Systems, Inc

Company/University address: 5542 Buckingham Drive, Huntington Beach, CA 92649

1) Machine OS information

Host system: Windows 10 Pro, version 20H2, OS build 19042.985

VM, using VirtualBox Version 6.1.22 r144080 (Qt5.6.2)

2) previous temporary License.dat file: zip file contains 080027F10E82_1607972172618.dat

3) Error message screenshot: see attached png file

4) Screenshot of Quartus >> tools >> license setup: see attached png files

5) assembler report .asm.rpt file: zip file contains AaXqR4.asm.rpt

AR_A_Intel
Employee
758 Views

Hi

Thanks for update. Based on my understanding, the seat greeter session is not created due to you don’t have a valid license for it. The IP needs a valid license of Video and Image Processing Suite (6AF7 00EE) to be activated.

Please kindly contact your nearest Intel salesperson or distributor to purchase a license file. You could refer the contact for our sales and distributor from link below:

https://www.intel.com/content/www/us/en/partner/where-to-buy/overview.html


syam
Beginner
713 Views

Hi

 

Both the INTEL doc and Quartus both doesn't specify any functional limitation for the IP. There is only a time limitation. Please see the attachment. The error with seat greeter session not being created is a functional issue. Can you please elaborate on which functional features of Video and Image Processing Suite IP are restricted in the time limited SOF ? 

 

Best Regards

Syam

Degree Controls Inc (www.degreec.com)

C4, Belhaven Gardens, Kowdiar,

Thiruvananthapuram, Kerala 695003

India

 

 

 

 

AR_A_Intel
Employee
701 Views

Thanks for your update. Please give me some time to further check with teammate. I will get back to you with an update.

 

Thank you


AR_A_Intel
Employee
686 Views

Hi

Sorry for the long delay as I was out of office. Done checking and based in my understanding, from you description that you previously had a temporary full license and produced an rbf.file. and now you use the time limited sof to continue development. You also did compare the sof versions of the logs against the rbf versions. “I compared the sof versions of the logs against the rbf versions. The only significant difference I found is in the lightdm.logs. In the sof version, the seat greeter session is not created.”  this is due to the IP Evaluation Mode limitation behavior. To run the .rbf file, the IP needs a valid license.

For better support regarding functional issue on the IP of Video and Image Processing Suite (6AF7 00EE) the recommendation is for you to file new forum case where Intel can then assign case to correct support team since we have different engineers to handle different field of specialty.

Thank you for your understanding.


AR_A_Intel
Employee
678 Views

We have not heard from you and I hope that my last note clears up this matter. If you don’t have any further question, I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.


BMart12
New Contributor I
675 Views

Hello,

I was wondering how to implement your instruction on filing a new forum case.  Either I can just duplicate the original inquiry or create a new one that refers to this thread.  As of your current update, does moving this thread to community support mean that may case will be assigned to the relevant expert?  I am a little confused on how to proceed from here.  Preparing the original inquiry consumed several hours.  Please advise.

 

Thanks

BMart12
New Contributor I
547 Views

Hi AR_A_Intel,

 

I finally got around to investigating my issue with the time limited SOF.  My project has several revisions.  I discovered that when I switched to the revision that instantiates the VIP package with the other custom IP blocks I forgot to generate the DTB for the LCD revision.  Once I updated the DTB for this revision and installed it on my system the LCDs now work as expected.

 

Thank you for your support.

 

Ben Martinez

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