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VHDL conversion of AN480 for 3GPP

Altera_Forum
Honored Contributor II
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In this application example, I’ve converted the existing Application Note for a 1536-point FFT for 3GPP LTE radio design (an480 (http://www.altera.com/literature/an/an480.pdf)) from Verilog to VHDL. The current AN480 is written entirely in Verilog and uses Matlab to generate input data files and do bit-for-bit verification of output files written by a Verilog Testbench. I’ve created a functionally equivalent pure VHDL version of the design, including the File I/O and Matlab interaction. 

 

Please contact me if you want the design files (10MB zip file)
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Altera_Forum
Honored Contributor II
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it is a good example!

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