When generating the "ASMI Parallel II Intel FPGA IP", there is an option to not include the ASMIBLOCK:
"Disable dedicated Active Serial interface" = "Routes the ASMIBLOCK signals to the top level of your design."
Is cyclone10gx_asmiblock documented anywhere? Having the option implies that you can instantiate the ASMIBLOCK outside of the IP, but I can't find documentation on the block itself.
