calibration of ddr4 interface on 10AX066H4F34E3SG

[Andrey_Fazan]

Hello! I'm trying to implement DDR4 40bit-wide interface with 3 devices MT40A512M16LY-062E. When I connect only one of 3 devices to the project, calibration and data exchange do well, but when I connect all 3 devices - calibration fails. Why it happens and how can it be fixed?

[AdzimZM_Intel]

Hi Andrey,

Thank you for sharing those files.

It's looks like the sdram_a cannot be worked when enabling 16bit and combing with other memory.

I'm not sure what is the reason for that but I think it's could be related with the voltage.

So can you probe on your board at the sdram_a[7...0] and sdram[15...8] to analyze the voltage?

Regards,

Adzim

[yoichiK_intel]

Hi

just to make sure , do you use the 240 resistor as RZQ resistor on your board ?

[AdzimZM_Intel]

Hi Andrey,

Do you have any update on this?

Regards,

Adzim

[Andrey_Fazan]

Hi, Adzim
Is it possible to get PCB layout of arria 10 soc development kit? It could help us check if our layout of DDR4 devices is correct.

Thank you!

[yoichiK_intel]

Hi

You can download the PCB layout of arria 10 soc development kit from the link here

https://www.intel.com/content/dam/altera-www/global/en_US/support/boards-kits/arria10/soc/Production_files/arria10_10as066n3f40_soc_v15.1.2.zip

[Andrey_Fazan]

Hi!
just to make sure , do you use the 240 resistor as RZQ resistor on your board ? - Yes, we use it

So can you probe on your board at the sdram_a[7...0] and sdram[15...8] to analyze the voltage? - Everything with voltage is fine, but we need to update our board, so I will tell later about results

Thank you!