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Altera_Forum
Honored Contributor I
742 Views

can I use 10G PHY IP core without Transceiver Reconfiguration controller

Dear Sir, 

I am using 10G PHY hard ipcore. I am not changing the reconfiguration of 10G PHY IP core dynamically. So can I use 10G hard ip core without transceiver reconfiguration controller in Stratix V GX and Arria10 FPGAs. Can you reply me regarding this. 

with regards, 

y v subba rao
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Altera_Forum
Honored Contributor I
17 Views

Transceiver reconfiguration controller IP does calibration as well. So you should connect a transceiver reconfiguration contorller to your Straitx V PHY IP cores. Otherwise, your PLLs/buffers won't work. 

 

For Arria 10, a reconfiguration controller is in PHY IP core. You don't need separated IP cores. 

 

One important note is that Reconfig_clk_clock of Straitx V transceiver reconfiguration controller and CLKUSR of Arria 10 devices must be in operation when the FPGA turned on. You may refer to Pin Connection Guidelines for your device.
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