FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5881 Discussions

channel width on avalon-st multiplexer

Altera_Forum
Honored Contributor II
823 Views

The "Qsys System Design Components" section of the Quartus II handbook describes an Avalon-ST channel multiplexer core. The documentation states that a "value of 0 means that the optional channel signal is not used." When I set the "Channel Signal Width (bits)" field to 0 in Qsys, the wizard complains that channel isn't wide enough. What gives? How do I insert an Avalon-ST multiplexer that does not use the channel signal on the output?

0 Kudos
0 Replies
Reply