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I met a strange problem when I was trying to instantiate triple speed Ethernet MAC from SOPC builder.
In SOPC builder, the device family is cycloneIII, as we can see from the following lines in .sopc file: <parameter name="deviceFamily" value="CYCLONEIII" /> However, after instantiate tse and generate the system in SOPC builder, from the .ptf file, I can see the following: HDL_INFO { Simulation_HDL_Files = "/home/Altera/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v, /home/Altera/quartus/eda/sim_lib/stratixiv_hssi_atoms.v,eth_tse.vo,eth_tse_loopback.v"; } Why I need StratixII and StratixIV atom files here for my tse in CycloneIII? Thanks!Link Copied
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FYI, I found similar cases even in the reference design.
For example, in tse reference design for cycloneIII, in the SOPC builder generated verilog file "tserd_3c120_sopc.v", I found the following files need to be included: `include "/tools/altera/9.1/internal/222/linux64/quartus/eda/sim_lib/stratixiigx_hssi_atoms.v" `include "/tools/altera/9.1/internal/222/linux64/quartus/eda/sim_lib/stratixiv_hssi_atoms.v" It's strange since this is the reference design for cycloneIII, why I need Stratix device simulation library?- Mark as New
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I too am having trouble with the PCIe demo. Note that the Web Edition of Quartus II does not include support for Stratus IV devices, although the Qsys demo seems to require some Stratus IV files:
“triple double-you dot altera.com/literature/po/ss_quartussevswe.pdf” I will try to extract these files from the Standard Edition and see if I can get the demo to build.- Mark as New
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The attached zip archive contains the missing "stratixiv" files that are needed to build the "PCI Express Hard IP Design with Qsys" exercise. These files should be placed in the following directory:
"C:\altera\11.0sp1\quartus\eda\sim_lib" This step is only necessary if you are using the Web Edition of Quartus 11.0sp1. The Subscription Edition already contains these files.
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