Hi all,
I have a SOPC system with Nios II and ddr2 sdram controller. I want simply write/read data to/from the memory. I wrote a program who write 0x0A in the first cell of memory. My problem is that the data is wrote in the row 0 cell 0x00 and also in the row 2 cell 0x00. I used Signal Tap to check the problem and I saw one single write request but I wrote two memory cells. I think this is an address problem, but I don't know where is the problem.
The rows are coupled in this way
0x00000000 = 0x00000010
0x00000001 = 0x00000011
0x00000100 = 0x00000110
0x00000101 = 0x00000111
...
The second bit is ignored.
This error is with a bus width 64 bit (128 ddr2 side), if I change the size of the bus, for intance 32 bit (64 ddr2 side) the error is the same but the rows are coupled as the following:
0x00000000 = 0x00000001
0x00000010 = 0x00000011
0x00000100 = 0x00000101
0x00000110 = 0x00000111
In this case the first bit is ignored.
My board is Cyclone II EPC2C70.
Can anyone help me?
Thanks in advance
Luca
