I set up a project(it's name is test_video) using the VIP core,when I only use the "test pattern generator" IP core (I give it the name test)in my project,after compiling design in quartus,I start the modelsim from the quartus II,and there is a test.vho in my projenct file,I compile the test.vho and test.vhd in modelsim,(and I resolve some problem before compiling,the generated test.vhd can not be compiled in modelsim,because it does'nt including the library IEEE and use IEEE.std_logic_1164.all, and the last ; in the entity must be cut)I use the GUI to add the value to input signal(clock,reset,data_ready),then I start the simulation,I get no data,no start of packet,no end of packet,no data_valid(these are the test pattern generator IP core's output),so I check my design,after I do EDA Netlist Writer in quartus's compile the design,I found there is a new file--test_video.vho in my project file\modelsim\simulation,after I compiling it in modelsim,I found there is structure (it's property is architecture)under modelsim's work library's test_video entity,not just a rtl architecture,now I can simulating the test_video,I can get the right output,althouh if simulating the work library's test entity,I get nothing also.Then I add a scaler to my design and compile it,but now it can't do EDA Netlist Writer in quartus's compile,because there is open core plus time_limited IP core--the scaler(it need a license,if there is no license,it just generate a timi-limited.sof file),so I can't get the test_video.vho in my project file\modelsim\simulation,I start the simulation in modelsim,compiling the test_video.vhd,test.vho,test.vhd; I get no output again. what I want to ask is dose it need a license to do the simulation,(even the simulation model is generated--the .vho or .vo file),and the other question is even I get the license(so I generate the projectname.vho,such as test_video.vho )I can't simulate the entity included in my project(I can't simulate the test in work library,only simulate the test_video),is it right?
you shouldn't need a license to simulate the .vo/.vho simulation models generated by the core. as you've discovered, you'll need a license to use the EDA Netlist Writer for the cores which are licensed (scaler is, test pattern generator is not)you should first try and figure out why the simulation models weren't working since this is the intended flow. what version of the software are you using?