I want to move the code below into my quartus project. So which IP cores can replace for these two functions?
genvar i;
generate
for(i=0;i<12;i=i+1)begin : ad_if_bus
IDDR
#(
.DDR_CLK_EDGE ("SAME_EDGE_PIPELINED"),
.INIT_Q1 (1'b0),
.INIT_Q2 (1'b0),
.SRTYPE ("ASYNC")
)
IDDR_bus (
.Q1 (ad9361_bus_in_he[i]),
.Q2 (ad9361_bus_in_le[i]),
.C (bufg_rx_clk), // 1-bit clock input
.CE (1'b1),
.D (p0_d[i]),
.R (1'b0),
.S (1'b0)
);
end
endgenerate
ODDR #(
.DDR_CLK_EDGE ("SAME_EDGE" ))
i_tx_data_oddr (
.CE (1'b1 ),
.R (1'b0 ),
.S (1'b0 ),
.C (data_clk ),
.D1 (tx_data_p[l_inst] ),
.D2 (tx_data_n[l_inst] ),
.Q (tx_data_oddr_s[l_inst] ));
