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how to use valid signal with readdata in Avalon Memory Mapped Interface

Mahdi
New Contributor I
189 Views

Hi, 

How can I make sure that the incoming data from memory is the response to memory read request and is also valid?

 

I am using Avalon Memory-Mapped Interface and I want to get a valid signal for each data that I request from memory by a readdata request. 

 

Can I use this condition: (response == 0)? Does it arrive at the same clock that data arrives?

Mahdi_0-1646937447944.png

 

Note that I am using a fixed-latency read, so I am not able to use readdatavalid signal.

Mahdi_1-1646937624481.png

 

Thanks,

 

Mahdi

 

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1 Solution
sstrell
Honored Contributor III
168 Views

Yes, a response of 0x0 can be sent along with valid readdata.  Check the info "For read responses" in that table.

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2 Replies
sstrell
Honored Contributor III
169 Views

Yes, a response of 0x0 can be sent along with valid readdata.  Check the info "For read responses" in that table.

ShengN_Intel
Employee
127 Views

Hi,


Since the issue addressed had been resolved.

I'll now transition this thread to community support.

If you have a new question, feel free to open a new thread to get the support from Intel experts.


Thank you.


Best regards,

Sheng


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