FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

irda problem

Honored Contributor II

Hi, i'm trying to implement an IR interface with FPGA altera de2, cyclone ii. 

the IRDA ic is hsdl-3201. 


after looking with osciloscope, i realized that ir signal is modulated by 38khz pulse (with D.C about 90%) 

so i have built a clock with frequency ~38khz , so sampling at this rate to generate demodulated signal. 


after that, try to read the trasmit data and count the time the signal is high and low. it doesn't work  

and i guess there's something basic i don't do /understand.  

could someone advice plz.
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