Hi!
I have a Terasic DE4 board (Stratix IV GX) and want to use the altera_xcvr_xaui which takes 64 data bits at a clock of 156.25MHz and 8 control bits and serializes them to 4 xaui lanes to build a simple loopback. I don't need a MAC, just the direct transfer of some test data. Is this possible and is there an example for this? currently I have a loopback adapter put on HSMC port B so that the xaui receives itself but the data I send does not come through. Is it important to use the proper start/stop bytes (0xFB and 0xFD? For a first test I would think I can send any data (e.g. data = 0x00, control = 0 or data = 0xff and control = 0) without frame structure. the pll_ref_clk and phy_mgmt_clk I have connected to a 156.25MHz clock generated by a Stratix IV pll, the management interface is not used to change any registers.
-Jochen
