making use of PCI Express Cyclone10GX Example Avalon-ST interface

[PVanL]

Dear Intel Support,

I built the example as in ug-dex-a10-pcie-avst.pdf, using modelsim as simulator. It works as described. I want to use the PCIexpress by connecting the Avalon-ST interface to Intel's MAC (from the Low Latency MAC example), and my own PHY, see the attached powerpoint. 

The point is, i cannot find any data moving on any line, except for the signals on the ST-interface, and on the serial data lines, but no data on any signal like e.g. "pipe_sim_only_xx" or whatever signal. So, i have no clue where to connect what signal, and /or how to pack ethernet signals as payload into a PCIexpress signal.

I am looking for an identifiable testbench in e.g pcie_example_design_tb, but cannot find it, also not in DUT_pcie_tb_ip, of which i expect it works as the testbench. Normally a testbench has a driver, a monitor, a comparator, some clocks and resets, and some wait statements to have the configuration settle down. I cannot find anything like that. 

And do you have something that takes care in simulation to pack/ unpack ethernet into/from PCIexpress?

Thanks in advance,

Pieter

[PVanL]

I did not look carefully enough. There are more  ports and wires with active signals.

The signals in the wave.txt are active during simulation, yet i find it difficult to identify what the meaning is of some of them, and where to intercept for the intended application, see above

[Rahul_S_Intel1]

Hi ,

The only example design we provided is from the example design that is been generated from the IP. 

And another example design you can find from our design stores.

https://fpgacloud.intel.com/devstore/platform/?search=pci&acds_version=any&family=arria-10

You can use Arria 10 PCIe reference design as an example for your development..

Particular to your integrated design we do not have

[PVanL]

Hi  Rahul_S_Intel1

Do you know if INTEL has some program to support startups with cheap licenses for modelsim and quartus pro version, and for the Cyclone10GX development board. And if so, can you direct me to this program / person who manages this?

Thanks in advance,

Regards, Pieter