hi everybody,
I have created a sopc builder project which connects my custom logic to nios II processor. I have created simulation file and run simulation. Everything is correct but i am not able to understand nios II signals in modelsim waveform and their values that are automatically generated. There are 2 types of signals in cpu_0.
starting with i
i_readdata
i_address
i_read.
etc
starting with d
d_readdata
d_address
d_writedata.
etc
The d_writedata is coming always 0 in the simulation. Is this the avalon writedata signal that will go to my custom slave through avalon switch interconnect and where did the code for this interconnect logic resides? I am not able to understand these signals and their values.
Is there any guide which describes these signals?
another thing is that when i run simulation by clicking run_simulator in sopc,there are options for compiling but there is no option to run. I have done it manually by run -all. Is this correct method
Regards
Pankaj
