FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6393 Discussions

problem with ddr2 core

Honored Contributor II

when I generate a core, something wrong with it. Whatever device I choose in the project,it will turn in to EP1C20 when click '1.parameterize'.And there is an error:Internal error in timing script. 


Anyone can tell me why this happened? I have tried to reinstall the system and Quartus,but it still doesn't work. This function runs well on other's computer,I really can't understand. 


Anyone can help? Thanks!
0 Kudos
0 Replies