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programmable input output slave peripheral with programmable interrupts

Altera_Forum
Honored Contributor II
‎07-17-2009 05:23 PM
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This design is an Avalon PIO (programmable input output) slave peripheral with programmable interrupts. The design can be parameterized to a customized width from one (1) up to thirty two (32) bits wide.  

 

This design consists of Verilog source (interruptable_io.v) and an SOPC Component Editor file (interruptable_io_hw.tcl). Also provided is a sample Verilog testbench (interruptable_io_test.v), Quartus® II project files, and a Quartus II simulation file (interruptable_io.qsf, interruptable_io.qpf and interruptable_io.vwf).
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