FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5741 Discussions

read data incorrect from ddr2 sdram with altmemphy.

Altera_Forum
Honored Contributor I
770 Views

Hi,guys. 

 

 

the Altmemphy megafuntion is used as the ddr2 sdram's phy interface in my project.But sometimes the read data is incorrect after read out from ddr2 sdram when on board test,it's that the read data is different from the wrtie data that located in the same address.In this case,the calibration is successfully done.
0 Kudos
1 Reply
Altera_Forum
Honored Contributor I
63 Views

Is the termination of the transmission lines correct? In other words did you properly add ODT and OCT to your design (and thus the Rup and Rdown pins on the FPGA side)? 

 

You also might want to post some more information about your project, since now we can just guess.
Reply