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Altera_Forum
Honored Contributor I
1,078 Views

vsim-3170 error: Could not find...while simulating Altera NCO IP

Hi , 

 

 

I am quite new to Altera (Xilinx /Actel guy up to date) and I am trying to simulate an Altera NCO IP with frequency modulation input to see its frequency resolution performance. 

So, I generated the IP with the Megawizard (Quartus II 9.0 sp2), wrote a simple testebench that modifies the phase increment and the frequency modulation input and the following .do file: 

 

 

 

# ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++# Compile sources & test# ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ vcom -work work -nologo -novopt NCO_CORDIC.vho vcom -work work -nologo tb_dds_cordic.vhd # ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++# Start simulator# ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ vsim {work.tb_dds_cordic(test)} +notimingchecks -novopt -t ps \ add log -r * set StdArithNoWarnings 1 run 0.0 ns; set StdArithNoWarnings 0# -------------------------- do wave_dds_chirp.do run 50000 us;  

 

I am running Modelsim 6.5b PE . When I run the simulation , the two files compile but I get the error: ** Error: (vsim-3170) Could not find 'C:\FPGA\DDS\work. '. But in the work folder there are the .dbs , .dat files (output of the compile process). Any hint on what could be going on here?? 

 

 

Regards 

 

 

zermelo
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3 Replies
Altera_Forum
Honored Contributor I
112 Views

Modelsim compiles HDL source into library folders. I suspect if you type 'vmap work' you will get the response that work maps to the directory you are receiving an error about. Add the following to your script 

 

vlib work vmap work ./work  

 

and that will create a library in the same folder. You could change ./work to a full path. 

 

Take a look at some of the example code I've posted. Read the sim.tcl scripts ... 

 

http://www.alteraforum.com/forum/showthread.php?t=45770 

http://www.alteraforum.com/forum/showthread.php?t=32386 

 

Cheers, 

Dave
Altera_Forum
Honored Contributor I
112 Views

Hi, 

 

I added them , and still the same error: 

 

# Loading work.tb_dds_cordic(test)# ** Error: (vsim-3170) Could not find 'C:\FPGA\DDS\work. '.# Error loading design# Error: Error loading design # Pausing macro execution # MACRO ./seq_dds_cordic.do PAUSED at line 21  

 

I deleted the physical work library prior to executing the script. Strange that the vcom can compile in work but the vsim fails... 

 

zermelo
Altera_Forum
Honored Contributor I
112 Views

Post your code and simulation script, or email me a zip file (to my forum name), and I'll see if I get the same error. 

 

You could also take a look at the scripts I wrote in the threads I linked to above and see if you have something different. 

 

Cheers, 

Dave
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