[ADC-SoC] Low sampling rate of ADC LTC2308 on the ADC-SoC board

[Shirley]

I have a Cyclone V SoC high-speed ADC Development Kit (ADC-SoC) from Terasic Inc. It uses ADC LTC2308 from Linear Technology. Both the ADC-SoC manual and the datasheet of LTC2308 says it has a sampling rate of 500ksps. However, during my measurement of LTC2308 in the ADC-SoC board using the example "ADC_SOC_ADC" provided by Terasic, it only has a sampling rate of 100ksps. Is it a hardware or software problem? Is there any way to make it 500ksps?

[JonWay_C_Intel]

Hi @Shirley 

Check how many channels are you measuring? The more the channels the lesser the sampling rate. Check using just 1 channel, disable the others.

[Shirley]

Hi JonWay, many thanks for your reply. I forgot to mention that I had figured out how to set a higher sampling rate. Changing the tHCONVST parameter in adc_ltc2308.v to a smaller value will increase the sampling rate. It's associated with the operation of ltc2308. The default value of tHCONVST is to set a sampling rate of 100ksps.

[JonWay_C_Intel]

Thank you very much for your sharing. I'm sure this will be helpful to others who faces the same issue. Meanwhile, I will set this thread to closed.