FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
5930 Discussions

Accessing RAM from custom IP in Platform Designer.

URN
Novice
556 Views

Does anyone have a simple example of Verilog to access RAM within an SOPC block as a custom IP with Avalon MM interface? Thanks.

0 Kudos
1 Reply
GuaBin_N_Intel
Employee
253 Views

We have some tutorial and video on how to build a new avalon-mm IP, either find in google "Making Qsys Components Tutorial" or https://www.youtube.com/watch?v=v6rhbVABlo8. To access it, you have a master interface that compatible to avalon-mm spec https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/manual/mnl_avalon_spec.pdf, Figure 7.

0 Kudos
Reply