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Hi,
I have an Agilex™ 5 FPGA E-Series 065B Modular Development Kit, and I also created a project in which I intended to use pins from banks 6E, 6G, 6F, and 6H.
However, when I open Quartus and the Pin Planner, all the pins from these banks are shown as No Connect. I generated an I/O Banks report for the device A5ED065BB32AE4SR0, and these banks are not listed.
I am a bit confused because in the DevKit schematics, the IOs from these banks are routed, and the documentation on the website states that they can be used as HVIO.
Could you please clarify what is the status of these banks? Are they perhaps intended for migration to higher devices, such as Agilex 7?
Bert Regards,
Robert
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