CPU is not recognized while creation of bsp

[Ranjani]

Hi all,

 I want to design simple code like hello.c on ARRIA 10 evaluation board. for this i would like to use IBEX as CPU instead of Nios. While I try to export the bsp settings to Ashling IDE,  qsys is not able to figure out the cpu from drop down. Any workaround from anyone will be appreciated. 

I have attached the snip for your reference.

Thanks in advance folks. 

[sstrell]

I seriously doubt this is supported unless you've found information that proves otherwise.

[Ranjani]

Hi SStrell

Thanks for your message. I see some examples done on other FPGA's , but on quartus I didn;t find any