FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
6478 Discussions

DDR3 and DDR2 at the same time, NIOS II

Altera_Forum
Honored Contributor II
‎08-31-2013 05:55 PM
1,261 Views

I'm designing a board using a Cyclone V FPGA, I using the reference design of the Cyclone V E Development Kit Board ( 5CEFA7F31 ), this chip have two hard memory controllers, the Development Kit Board use one controller for DDR3 memory (2x256MB) and the other memory controller have LPDDR2 512MB. I have some doubts, now i'm in the schematic design (memorypart) Can I use the two memory controllers at the same time? The two controllers must have the same kind of memory ? The 5CEFA7F31 doesn't have hard processor, so i will use NIOS II, what is tha maximum memory that it can use? thanks in advance

0 Kudos

Link Copied

0 Replies
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.