Thank you for joining this Intel Community.
Please allow me to address your question as below:
1 如何知道Arria10器件Banks 是否连续？
[Aida]: Yes, you are right. It is based on the picture shown in the manual. Extra info for I/O column 2 as below:
- Bank 2L and 2H is a 3V I/O bank which does not support OCT calibration hence it is not useable for EMIF
- Bank 2A is not adjacent to Bank 2G and 2H. Thus, if you require multiple EMIF's which may also required multiple I/O Banks, it cannot be place in Bank 2A.
2 在bank 里面摆放DDR， 剩余的IO是否可以当用户GPIO使用？
假如说一个bank里面DDR 占用了一个Lane ，剩下的Lane,用户可以使用？
[Aida]: Yes, you are correct. Any pins in a bank which are not used by the external memory interface remain available for use as general purpose I/O pins only of the same voltage standard.
Hope this helps. 😊